www.gusucode.com > CIC抽取滤波器的MATLAB设计及FPGA实现 > CIC抽取滤波器的MATLAB设计及FPGA实现\文件说明.txt

    CIC抽取滤波器是无线通信中的常用模块,一般用于数字下变频(DDC)系统中。它可以在降低采样速率的同时,完成低通滤波的作用。本论文介绍了CIC抽取滤波器的工作原理,并给出了CIC滤波器的MATLAB程序及仿真结果。最后,利用FPGA高速、高稳定性的特点,在QUARTUS设计环境下进行了CIC滤波器的HDL模块设计。CIC decimation filter is a common module in wireless communication, generally used in digital down conversion (DDC) system. It can reduce the sampling rate at the same time, to complete the role of low-pass filter. This paper introduces the working principle of CIC decimation filter, and gives the MATLAB program and simulation result of CIC filter. Finally, the HDL module design of CIC filter is carried out in QUARTUS design environment by using FPGA high speed and high stability.