www.gusucode.com > dsp 案例源码程序 matlab代码 > dsp/HDLFIRRateConverterInterp5PortExample.m
%% Control Input Rate When Upsampling % Convert a signal from 40 MHz to 100 MHz using the HDL FIR Rate Converter System % object(TM). Use the optional |ready| output signal to avoid overrunning the % object as the data is upsampled. The |ready| signal indicates the object can % accept a new data sample on the next call to the |step| method. %% % Define the sample rate and length of the input signal, and a fixed-point % cosine waveform. Create a |SignalSource| object to provide data samples % on demand. Fs = 40e6; Ns = 50; t = (0:Ns-1).'/Fs; x = fi(cos(2*pi*1.2e6*t),1,16,14); inputSource = dsp.SignalSource(x); %% % Define the rate conversion parameters. Use an interpolation factor of 5 and % a decimation factor of 2. Determine the number of calls to the |step| method % needed to convert _Ns_ samples. L = 5; M = 2; numSteps = floor(Ns*L/M); %% % Create the System object and configure it to perform rate conversion % using the desired factors and an equiripple FIR filter. Enable the % optional |ready| output port. Numerator = firpm(70, [0,.15,.25,1], [1,1,0,0]); rateConverter = dsp.HDLFIRRateConverter(L,M,Numerator,'ReadyPort',true); %% % Create a *Logic Analyzer* to capture and view the input and output signals. la = dsp.LogicAnalyzer('NumInputPorts',5,'SampleTime',1/Fs,'TimeSpan',numSteps/Fs); addWave(la,'InputChannel',1,'Name','dataIn','Format','Analog','Height',5) addWave(la,'InputChannel',2,'Name','validIn') addWave(la,'InputChannel',3,'Name','dataOut','Format','Analog','Height',5) addWave(la,'InputChannel',4,'Name','validOut') addWave(la,'InputChannel',5,'Name','ready') %% % Initialize the |ready| signal. The object is always ready for input data on % the first call to the |step| method. ready = true; %% % Execute the |step| method of the System object to perform the rate % conversion and obtain each output sample. Apply a new input sample when % the object indicates it is ready. Otherwise, set |validIn| to |false|. for k = 1:numSteps if ready dataIn = step(inputSource); end validIn = ready; [dataOut,validOut,ready] = step(rateConverter,dataIn,validIn); step(la,dataIn,validIn,dataOut,validOut,ready) end